A dual-mode architecture for a phased-array receiver based on injection locking in 0.13µm CMOS

Phased arrays have long been used by the military for radar applications, but have only been recently applied to consumer applications. In a phased array system, one or more narrow beams are generated by transmitting (or receiving) a common RF signal that is phase shifted at the output of each antenna in the array such that the direction of the beams can be varied by controlling the phase difference between consecutive antennas. Microwave transceivers for phased-array radar applications have traditionally been fabricated in III–V technologies like GaAs and InP due to their superior ƒ
T
and ƒ
max
. However, modern-day CMOS and BiCMOS technology nodes are now exhibiting ƒ
T
and ƒ
max
in the range of 200 to 250GHz, tipping the scales in favor of silicon due to its higher integration capability, lower costs and the availability of significant digital signal processing. Recent designs in CMOS have shown its capability to handle millimeter-wave frequencies [1–3].