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A dual-mode architecture for a phased-array receiver based on injection locking in 0.13µm CMOS

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3 Author(s)
Patnaik, S. ; Univ. of Minnesota, Minneapolis, MN ; Lanka, N. ; Harjani, R.

This paper introduces two new phase-generation schemes, based on injection locking, for local oscillator (LO) phase-shifting phased-array receiver architectures. An integrated four-channel phased-array receiver operating at 2.4 GHz is fabricated in a 0.13 mum CMOS technology. The design consists of a mixer and a phase-generation oscillator for each channel, in addition to a four-channel intermediate-frequency (IF) summer and 256b serial register for digital programming. This unique architecture exploits the steady-state phase at the output of an injection-locked oscillator (ILO) to create the desired phase-shift pattern. The four-channel receiver core draws only 42 mW (10.5 mW/channel) from a 1.55 V power supply and occupies 1.2times1.2 mm2 of active area. This is approximately 50% lower power than phased-array receivers reported in the recent literature. The use of differential inductors can further improve the performance, and reduce the active area of the receiver.

Published in:

Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International

Date of Conference:

8-12 Feb. 2009