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This paper presents a three-dimensional (3D) system integration of a commercial processor and a memory by using inductive coupling. A 90 nm CMOS 8-core processor, back-grinded to a thickness of 50 mum, is mounted face down on a package by C4 bump. A 65 nm CMOS 1 MB SRAM of the same thickness is glued on it face up, and the power is provided by conventional wire-bonding. The two chips under different supply voltages are AC-coupled by inductive coupling that provides a 19.2 Gb/s data link. Measured power and area efficiency of the link is 1 pJ/b and 0.15 mm2/Gbps, which is 1/30 and 1/3 in comparison with the conventional DDR2 interface respectively.
Date of Conference: 8-12 Feb. 2009