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A 45nm 8-core enterprise Xeon® processor

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9 Author(s)

The next-generation enterprise Xeonreg server processor consists of eight dual- threaded 64b Nehalem cores and a shared L3 cache. The system interface includes two on-chip memory controllers and supports multiple system topologies. This design has 2.3B transistors and is implemented in 45 nm CMOS using metal-gate high-K dielectric transistors and nine Cu interconnect layers. The thermal design power is 130 W.

Published in:

Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International

Date of Conference:

8-12 Feb. 2009