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Schottky barrier height of TiN/p-type Si(100) evaluated by forward current–voltage and capacitance

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2 Author(s)
Pelleg, Joshua ; Department of Materials Engineering, Ben Gurion University of the Negev, Beer Sheva 84105, Israel ; Douhin, A.

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1116/1.1850104 

Schottky barrier height Bp) of amorphous TiN (∼40 nm) diode on p-type Si(100) obtained by reactive-sputtering was determined by forward current–voltage (I–Vf) and capacitance–voltage (C–V) measurements at room temperature and the effect of heat treatment was examined. The TiN remained amorphous following annealing. The zero-bias barrier heights evaluated by I–Vf of the as-deposited and annealed specimens were in the range of 0.53–0.64 V with an average of ∼0.58. The lower ΦBp values of 0.53–0.54 V are related to the as deposited and 673 K annealed specimens whereas the 0.62–0.64 V values refer to samples annealed at 773–873 K. Forward I–V measurements of as-deposited TiN/Si diodes were performed over the temperature range of 220–285 K. The activation energy evaluated from the ln(Js/T2) versus 1/T plot exhibits a linear relation through the entire temperature range. From the slope of this plot, the barrier height was determined at the saturation current density resulting in ΦBp=0.58 V, which is the same as the average value obtained from room temperature I–Vf measurements. Capacitance measurements at 1 MHz resulted in higher barrier heights than those obtained from I–Vf measurements in the range of 0.76–0.81 V. In the case of nonlinear C–V plots, an excess capacitance was taken into account for correcting the derived - - ΦBp values. Nonideal behavior was observed in some diodes, which was attributed to the effect of N on the interface.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:23 ,  Issue: 1 )

Date of Publication:

Jan 2005

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