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Study of InGaP/GaAs/InGaAs high-barrier gate and heterostructure-channel field-effect transistors

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6 Author(s)
Yu, Kuo-Hui ; Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, 1 University Road, Tainan, Taiwan 70101, Republic of China ; Lin, Kun-Wei ; Lin, Kuan-Po ; Chih-Hung Yen
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Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1116/1.1481862 

A heterostructure field-effect transistor with an n+-GaAs/p+-InGaP/n-GaAs high-barrier gate and n-GaAs/i-InGaAs/i-GaAs/delta-doped sheet heterostructure channel (device A) has been successfully fabricated and studied. The heavily doped p+-InGaP layer and heterostructure channel are introduced to increase the barrier height and carrier confinement, respectively. Experimentally, the device without the high-barrier gate structure (device B) is also fabricated for comparison to investigate the influence of high-barrier gate structure on device characteristics. Due to the high-barrier gate added to suppress the tunneling current in device A, the gate leakage current is also substantially reduced. Therefore, the turn-on voltage, breakdown voltage, current drivability, and transconductance linearity are all significantly improved for device A relative to device B. Furthermore, the temperature-dependent characteristics of device A are also improved. © 2002 American Vacuum Society.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:20 ,  Issue: 3 )

Date of Publication:

May 2002

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