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Intra-die device parameter variations and their impact on digital CMOS gates at low supply voltages

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6 Author(s)
Eisele, M. ; R&D, Siemens AG, Munich, Germany ; Berthold, J. ; Thewes, R. ; Wohlrab, E.
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Statistical intra-die variations of device parameters from a 0.5 μm CMOS process are determined, finding good agreement with the (WL) -1/2 model. It is proven that channel doping variations are responsible. Additionally, systematic proximity-induced parameter deviations due to different field oxide surroundings are found. The resulting variations of inverter delays for different supply voltages and gate areas are determined

Published in:

Electron Devices Meeting, 1995. IEDM '95., International

Date of Conference:

10-13 Dec 1995

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