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Search of optimum bias voltage for oxide patterning on Si using scanning tunneling microscopy in air

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4 Author(s)
Tseng, Kuen-Syh ; Department of Materials Science and Engineering, National Chiao-Tung University, Hsinchu, Taiwan 300-10, Republic of China ; Hsieh, T.-E. ; Lo, Shih-Che ; Lin, Hsi-Fu

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Nanometer-scale oxide patterns were fabricated on H-passivated Si using a scanning tunneling microscopy (STM) in air. We found that the optimum bias voltage to generate clean and uniform oxide patterns depends on the composition of the tip material rather than on the tip head sharpness. For tungsten tips, oxide patterns with the desired geometrical features can be obtained at bias voltages ranging from -0.8 to -1.2 V, while for platinum–iridium tips, the bias voltages lie between -1.5 and -2.5 V at a fixed tunneling current of 2.0 nA. These biases correspond to the working voltage generating the oxide pattern with the lowest apparent depth. Beyond these voltage ranges, tip scratching on the sample surface or field-induced mass transfer from the tip might occur, as evidenced by tip wearing and the contamination of debris of tip material in the vicinity of the patterns. On the other hand, the tip head sharpness affects the width and the height of line patterns. When extremely fine oxide lines were desired, a sharp tip has to be used for STM patterning. © 2000 American Vacuum Society.

Published in:

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures  (Volume:18 ,  Issue: 2 )

Date of Publication:

Mar 2000

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