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An electron beam pattern inspection system (EBIS) using digital image processing is presented. A pattern‐to‐data comparison method is used in this system to detect systematic, random and repeating defects of VLSI circuit patterns. The inspection data are generated from the design data, and transferred from a computer aided design (CAD) system via a computer network. In order to obtain the information of mask or wafer patterns, a low‐energy scanning electron microscope, which has the advantage of avoiding damage to the active devices and not charging the surface, is used. Frame memories are installed to store the inspection data and the actual pattern image. An extra image processor preprocesses the pattern image to obtain high signal‐to‐noise ratio and manipulates these images to extract defects. Two algorithms extracting the defects are studied. Spatial differentiation followed by a thresholding operation is a suitable procedure for the signal with drift.