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ASIC implementation of a RISC microprocessor for portable workstation

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3 Author(s)
Seung Ho Lee ; Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea ; Beoyng Yoon Choi ; Moon Key Lee

This paper describes the HDL based design of a RISC microprocessor for portable workstation which especially requires both cost effectiveness and highly integrated functions. Based on 0.6 μm TLM CMOS technology, this chip includes IU, MMU/CC, bus controller, and address translation memory in a 1.1 cm2 die size, and operates at 45 MHz. Both fast design time and the easiness of full functional verification could be feasible with standard cell based design methodology and pseudo system modelling

Published in:

Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on

Date of Conference:

6-10 Nov 1995

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