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VLSI realization of a 16×16 ATM switch using 1 μm CMOS technology

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2 Author(s)
Yeung, M.S. ; Adv. Network Syst. Lab., Chinese Univ. of Hong Kong, Shatin, Hong Kong ; Wong, P.C.

This paper describes the realization of a chipset of two VLSIs for a 16×16 ATM switch using 1 μm CMOS technology. The chipset can run up to 500 Mbps per port. The design is based on the pipeline Banyan architecture, which has the features of sequential packet delivery, low hardware complexity, and a close to 100% maximum throughput

Published in:

Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on

Date of Conference:

6-10 Nov 1995