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Electrochemical planarization by selective electroplating for embedded gold wiring in the sub-micron range

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2 Author(s)
Chan, M.Y. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong ; Lo, T.C.

A planar Au metallization process by electrolytic plating has been developed for metal interconnections in the submicron range. Gold wires with high aspect ratio were fabricated in an embedded structure within the dielectric spacer. By etching of Au and oxidizing the surface of TiW in the field, the gold wires can be selectively formed within the dielectric. This process can provide desired properties of conductor structures for Si LSI applications

Published in:

Microelectronics and VLSI, 1995. TENCON '95., IEEE Region 10 International Conference on

Date of Conference:

6-10 Nov 1995