Simultaneous switching noise (SSN) on power supply lines is caused by the large switching transient currents flowing through parasitic inductances at the chip-package-pin interface. A new expression to estimate SSN in CMOS circuits that includes the velocity saturation effects seen in the short-channel MOSFETs is derived. SPICE Level 3 simulation results show that the formula predicts the SSN more accurately as compared to existing approaches for submicron processes even at reduced supply voltages
Published in:
Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on
(Volume:19
,
Issue:
2
)
Date of Publication: May 1996