Referenced Items are not available for this document.
Systolic array is a hardware implementation of fast speed signal and data process using parallel pipeline method. The first systolic implement of QRD-RLS algorithm presented by Gentleman and Kung in 1981, is only suitable to solve the linear problem. In this paper, we will present how to use modified systolic array based QRD-RLS algorithm to identify the model parameters of the memory polynomial nonlinear model for a wideband RF power amplifier.
Published in:
Microwave Conference, 2008. APMC 2008. Asia-Pacific
Date of Conference: 16-20 Dec. 2008
- Page(s):
- 1 - 4
- E-ISBN :
- 978-1-4244-2642-3
- Print ISBN:
- 978-1-4244-2641-6
- INSPEC Accession Number:
- 10666667
- Conference Location :
- Macau
- Digital Object Identifier :
- 10.1109/APMC.2008.4957996
- Product Type:
- Conference Publications
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