Close category search window
 

Fully integrated high power RF front-end circuits in 2 GHz using 0.18um standard CMOS process

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Minsik Ahn ; Samsung Design Center, Atlanta, GA ; Kyu-Hwan An ; Chang-Ho Lee ; Laskar, J.
more authors

A high PA and an antenna switch were implemented in a single die with low noise amplifier to study feasibility of integration of all the RF front end components in a standard bulk CMOS process. Low voltage operation which is the biggest obstacle to implement a high power amplifier and a high power switch in the CMOS technology were resolved to by employing power combining technique using transformer and adaptive voltage swing distribution techniques. 30 dBm output power was obtained at 2 GHz with -40 dBc second and third harmonics. This is very promising data to open the possibility to integrate high power components in a standard CMOS process at cellular applications.

Published in:
Microwave Conference, 2008. APMC 2008. Asia-Pacific

Date of Conference: 16-20 Dec. 2008

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.