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Substrate-bias-dependent dielectric breakdown in ultrathin-oxide p-metal-oxide-semiconductor field-effect transistors

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5 Author(s)
Sinclair Chiang ; Central Research and Development Division, United Microelectronics Corporation, Science-Based Industrial Park, Hsinchu City, Taiwan, Republic of China and Department of Electronics Engineering, National Chiao-Tung University, Hsinchu, Taiwan, Republic of China 30077 ; Lu, M.F. ; Huang-Lu, S. ; Chien, S.C.
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An explanation of the breakdown behavior of ultrathin-gate-oxide (1.6 nm) p-metal-oxide-semiconductor field-effect transistors under a reverse substrate bias is presented. A significant degradation in lifetime induced by a positive substrate bias and a decrease in the power-law exponent (n) were observed. The quantitative hydrogen-based model [J. Sune and E. Wu, Digest of Technical Papers, 2001 Symposium on VLSI Technology, Kyoto, Japan, 12–14 June 2001 (unpublished), p. 97] is used to explain this observation while taking the channel quantization effect into consideration. Using this model, the stress voltage dependence of time-dependent dielectric breakdown in our experiment fits well with simulation results. This indicates that the degradation is due to the channel hole quantization-enhanced dissipation energy of injected electrons at the anode interface.

Published in:

Journal of Applied Physics  (Volume:98 ,  Issue: 2 )

Date of Publication:

Jul 2005

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