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Hole mobility in silicon inversion layers: Stress and surface orientation

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4 Author(s)
Sun, Guangyu ; Department of Electrical and Computer Engineering, University of Florida, Gainesville, Florida 32611, USA ; Sun, Yongke ; Nishida, Toshikazu ; Thompson, S.E.

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Hole transport in the p-type metal-oxide-semiconductor field-effect-transistor (p-MOSFET) inversion layer under arbitrary stress, surface, and channel orientation is investigated by employing a six-band kp model and finite difference formalism. The piezoresistance coefficients are calculated and measured at stresses up to 300 MPa via wafer-bending experiments for stresses of technological importance: uniaxial and biaxial stresses on (001) and (110) surface oriented p-MOSFETs with <110> and <111> channels. With good agreement in the measured and calculated small stress piezoresistance coefficients, kp calculations are used to give physical insights into hole mobility enhancement at large stress (∼3 GPa). The results show that the maximum hole mobility is similar for (001)/<110>, (110)/<110>, and (110)/<111> p-MOSFETs under uniaxial stress, although the enhancement factor is different. Strong quantum confinement and a low density of states cause less stress-induced mobility enhancement for (110) p-MOSFETs. For (001) p-MOSFETs, the dominant factor for the improved hole mobility is reduced conductivity effective mass at small stress and lower phonon scattering rate at large stress.

Published in:

Journal of Applied Physics  (Volume:102 ,  Issue: 8 )