By Topic

Spatially and temporally resolving the degradation of n-channel poly-Si thin-film transistors under hot-carrier stressing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
3 Author(s)
Ming-Hsien Lee ; Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan, Republic of China ; Kai-Hsiang Chang ; Horng-Chih Lin

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.2710302 

A test structure was proposed to investigate the spatial and temporal evolution of hot-carrier degradation in n-channel poly-Si thin-film transistors. Our experimental results clearly show that the initial damage during the early stage of hot-carrier stressing, which is still undetectable by conventional test structures, can be easily observed by the structure. In addition, the proposed test structure is also capable of resolving the evolution of the degradation along the channel, thus providing a powerful tool to study the location-dependent damage mechanisms.

Published in:

Journal of Applied Physics  (Volume:101 ,  Issue: 5 )