Spatially and temporally resolving the degradation of n-channel poly-Si thin-film transistors under hot-carrier stressing

A test structure was proposed to investigate the spatial and temporal evolution of hot-carrier degradation in n-channel poly-Si thin-film transistors. Our experimental results clearly show that the initial damage during the early stage of hot-carrier stressing, which is still undetectable by conventional test structures, can be easily observed by the structure. In addition, the proposed test structure is also capable of resolving the evolution of the degradation along the channel, thus providing a powerful tool to study the location-dependent damage mechanisms.