Cart (Loading....) | Create Account
Close category search window
 

Novel low-voltage BiCMOS digital circuits employing a lateral p-n-p BJT in a p-MOS structure

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Rofail, S.S. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore ; Seng, Y.K.

A new BiCMOS buffer circuit and its NAND logic gate implementation for low-voltage environments are presented. The circuit, based on a standard BiCMOS process, employs a lateral p-n-p BJT in a p-MOS structure to trap a charge during the pull-up cycle and using it to speed up the pull-down cycle. The analysis, simulations and SPICE results are based on the submicron technologies and they are used to confirm the functionality of the circuit and evaluate its performance. The comparison with previous circuits is carried out in terms of speed, output voltage swing and power dissipation. The results show that a large voltage swing at a high speed is achievable under 2.2 V operation. The BiFET action in the BiCMOS circuit design has been verified by some experimental results

Published in:

Circuits, Devices and Systems, IEE Proceedings -  (Volume:143 ,  Issue: 2 )

Date of Publication:

Apr 1996

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.