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Browse Journals & Magazines > Computers, IEEE Transactions ...> Volume:45 Issue:4 Help

A generalization of the single b-Bit byte error correcting and double bit error detecting codes for high-speed memory systems

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4 Author(s)
Sihai Xiao ; Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA ; Xiaofa Shi ; Feng, G. ; Rao, T.R.N.

In this paper, a general method using the subsets (generating sets) of GF(2b) for constructing the SbEC-DED codes will be presented. The constructions given in Fujiwara and Hamada (1992) are special cases of ours. For some values of b, the generating sets used in our constructions are larger than the cosets used in Fujiwara and Hamada (1992). Hence, a larger code length can be obtained

Published in:
Computers, IEEE Transactions on  (Volume:45 ,  Issue: 4 )

Date of Publication: Apr 1996

Page(s):
508 - 511
ISSN :
0018-9340
INSPEC Accession Number:
5277176
Digital Object Identifier :
10.1109/12.494112
Product Type:
Journals & Magazines
Date of Current Version :
06 August 2002
Issue Date :
Apr 1996
Sponsored by :
IEEE Computer Society

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