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Effects of annealing on pentacene field-effect transistors using polyimide gate dielectric layers

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3 Author(s)
Sekitani, T. ; Quantum Phase Electronics Center, School of Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan ; Someya, T. ; Sakurai, T.

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We report systematic studies on the effects of annealing on pentacene field-effect transistors (FETs). The FETs are fabricated on plastic films with polyimide gate dielectric layers, encapsulated with poly-chloro-para-xylylene (parylene) passivation layers, and annealed in a nitrogen environment at different substrate temperatures. The annealed FETs are functional at a measurement temperature of 160 °C and exhibit no degradations in the transistor performance after being subjected to a number of heat cycles between room temperature and 160 °C. The annealed FETs exhibit a change of less than 5% in the source-drain currents even after the application of dc voltage biases of VDS=VGS=-40 V for 41 h. When the FETs are annealed at 140 °C for 12 h in a nitrogen environment, the mobility increases from 0.52 to 0.56 cm2/V s and the on/off ratio also improves to 106.

Published in:

Journal of Applied Physics  (Volume:100 ,  Issue: 2 )

Date of Publication:

Jul 2006

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