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Polysilicon thin film transistors fabricated on low temperature plastic substrates

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4 Author(s)
Carey, P.M. ; Lawrence Livermore National Laboratory, P. O. Box 808, L-271, Livermore, California 94551 ; Smith, P.M. ; Theiss, Steven D. ; Wickboldt, Paul

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1116/1.581708 

We present device results from polysilicon thin film transistors (TFTs) fabricated at a maximum temperature of 100 °C on polyester substrates. Critical to our success has been the development of a processing cluster tool containing chambers dedicated to laser crystallization, dopant deposition, and gate oxidation. Our TFT fabrication process integrates multiple steps in this tool, and uses the laser to crystallize deposited amorphous silicon as well as create heavily doped TFT source/drain regions. By combining laser crystallization and doping, a plasma enhanced chemical vapor deposition SiO2 layer for the gate dielectric, and postfabrication annealing at 150 °C, we have succeeded in fabricating TFTs with ION/IOFF ratios ≫5×105 and electron mobilities ≫40 cm2/V s on polyester substrates. © 1999 American Vacuum Society.

Published in:

Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films  (Volume:17 ,  Issue: 4 )

Date of Publication:

Jul 1999

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