Nanoscale channel and small area amorphous silicon vertical thin film transistor

This article reports the design of vertical thin film transistors (VTFTs) in hydrogenated amorphous silicon (a-Si:H) technology. This transistor structure offers an elegant method of defining the channel length in nanoscale dimensions by means of dielectric film thickness. In addition, the device area of the vertical TFT structure is less than ∼1/3 that of the ubiquitous lateral TFT structure. We study the deposition mechanisms to gain insight into the fabrication of VTFTs from a conceptual standpoint. The a-Si:H VTFT reported here advances current state of the art, by demonstrating the first 100 nm channel length VTFT with an on/off current ratio of 10⁸, threshold voltage of 2.8 V, and a subthreshold slope of 0.8 V/decade. This is the shortest and truly vertical channel a-Si:H TFT reported, hitherto. We propose an application of a-Si:H VTFTs in high-resolution flat-panel electronics with TFT size independent fill factor, promising immense benefits in medical x-ray imaging.