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The physical model for field enhancement (FE) and the edge effects of body-tied FinFET charge-trapping NAND Flash devices are extensively studied in this paper. First, analytical equations are derived to provide insight to the FE effect for FinFET devices, and these analytical results are validated by 3-D TCAD simulation and experimental verification. Next, complicated programming and erasing characteristics and transconductance and subthreshold slope (gm/SS) behaviors are completely explained by the nonuniform injection behavior along various corner edges in FinFET. FE allows high program and erase speed and larger memory window. On the other hand, the edge effect complicates the device DC I-V, as well as programming and erasing characteristics, and these must be taken into account in memory circuit design.