Cart (Loading....) | Create Account
Close category search window

CMOS current mirrors with reduced input and output voltage requirements

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Prodanov, V.I. ; Dept. of Electr. Eng., State Univ. of New York, Stony Brook, NY, USA ; Green, M.M.

A CMOS current mirror with lower than VDS(sat) input voltage requirement is presented. It is shown that the structure can be modified to provide cascode-type output resistance for output voltages even lower than 2VDS(sat). The topology of the proposed current mirror allows low distortion operation from a single 1.5 V supply, which makes it attractive for low-voltage applications

Published in:

Electronics Letters  (Volume:32 ,  Issue: 2 )

Date of Publication:

18 Jan 1996

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.