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Polycrystalline silicon/metal stacked gate for threshold voltage control in metal–oxide–semiconductor field-effect transistors

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2 Author(s)
Polishchuk, I. ; Department of Electrical Engineering and Computer Science, University of California, Berkeley, California 94720 ; Chenming Hu

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A stack structure for the gate electrode of metal–oxide–semiconductor (MOS) transistors is proposed, analyzed, and simulated. The stack consists of a very thin polycrystalline silicon (polysilicon) layer and metal. By changing the thickness of the polysilicon layer, one can change the effective work function of the gate. Thus, the stacked-gate structure allows for a method to continuously adjust MOS field-effect transistor threshold voltage through gate work-function engineering while retaining the proven SiO2/polysilicon interface. © 2000 American Institute of Physics.

Published in:

Applied Physics Letters  (Volume:76 ,  Issue: 14 )