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A compact single-electron memory cell has been fabricated in silicon using a process that is compatible with complementary metal–oxide–semiconductor circuit fabrication. The device is based on the Coulomb blockade effect observed in highly doped silicon nanowires. The circuit shows clear memory operation with a ≫100 mV gap between “0” and “1” levels when tested at a temperature of 4.2 K. The response of the circuit to write and erase pulse sequences is also presented. © 1998 American Institute of Physics.