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A low power video encoder with power, memory and bandwidth scalability

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2 Author(s)
N. Chaddha ; Comput. Syst. Lab., Stanford Univ., CA, USA ; M. Vishwanath

This paper presents a low power video encoder with power, memory and bandwidth scalability for use in portable video applications. The encoder uses generic block transform based vector quantizer encoders implemented by table lookups. In these table lookup encoders, input vectors to the encoders are used directly as addresses in code tables to choose the codewords. There is no need to perform the forward or reverse transforms. They are implemented in the tables. In order to preserve manageable table sizes for large dimension VQs, we use hierarchical structures to quantize the vector successively in stages. Since both the encoder and decoder are implemented by table lookups, there are no arithmetic computations required in the final system implementation. Subjective distortion measures are used in the design of VQs. In this paper we study the memory-rate-distortion-power trade-off of a video encoder based on perceptually weighted hierarchical vector quantization. The video encoder allows to trade-off power and memory size for rate-distortion and vice-versa. The power consumption of our video encoder is orders of magnitude smaller than existing video encoders in similar technology. Measured performance shows that the video encoder consumes between 150 to 300 micro-watts with a 1.5 V power supply in 0.8 μ CMOS technology for 160×240 resolution video at 30 frames per second

Published in:

VLSI Design, 1996. Proceedings., Ninth International Conference on

Date of Conference:

3-6 Jan 1996