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A multiplier generator for Xilinx FPGAs

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3 Author(s)
Pal Singh, J. ; Cadence Design Syst. Pvt. Ltd., Noida, India ; Kumar, A. ; Kumar, S.

In this paper, we present a module generator which can produce variety of multiplier designs for LUT based FPGAs. It incorporates algorithms for generating sequential, combinational and pipelined designs. The multiplier generator forms a part of the IDEAS synthesis system. Different types of multipliers which can be generated have been included in the IDEAS component library, along with functions which estimate the CLB count and delays for the given size parameters and selected FPGA device. The multiplier generator generates designs for XC3000 and XC4000 family of Xilinx FPGA devices. For Xilinx XC4000 family of devices it takes advantage of the built-in dedicated carry logic to generate fast multipliers. The output of the generator is a netlist in terms of the Xilinx XACT and XBLOX components which is finally mapped onto the FPGA using Xilinx XACT and XBLOX tools

Published in:

VLSI Design, 1996. Proceedings., Ninth International Conference on

Date of Conference:

3-6 Jan 1996