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Node-covering based defect and fault tolerance methods for increased yield in FPGAs

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2 Author(s)
F. Hanchek ; Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA ; S. Dutt

Fault tolerant techniques are proposed which make use of the reconfigurability of SRAM-based field programmable gate arrays (FPGAs). Based on the principle of node-covering, a routing discipline is developed that reserves unused wiring in the routing channels to allow each cell to cover (to be able to replace) its neighbor in a row. If testing identifies a faulty cell, switches are set to reconfigure the faulty cell out of the array. Not only can reconfiguration of the FPGA be performed by the user, but it can also be done at the factory in such a way as to be transparent to a user programming the array. This can result in substantial yield improvement

Published in:

VLSI Design, 1996. Proceedings., Ninth International Conference on

Date of Conference:

3-6 Jan 1996