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Dual-gate pentacene organic field-effect transistors based on a nanoassembled SiO2 nanoparticle thin film as the gate dielectric layer

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2 Author(s)
Cui, Tianhong ; Institute for Micromanufacturing, Louisiana Tech University, P.O. Box 10137, 911 Hergot Avenue, Ruston, Louisiana 71272 and Department of Mechanical Engineering, University of Minnesota, 111 Church Street SE, Minneapolis, Minnesota 55455 ; Liang, Guirong

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.1861126 

In this paper, we report the fabrication of dual-gate organic field-effect transistors (OFETs) using self-assembled SiO2 and thermal oxide as gate dielectric materials and pentacene as a semiconductor. The top dielectric layer was formed by the low-cost and low-temperature self-assembly with SiO2 nanoparticles 45 nm in diameter. The fabricated dual-gate pentacene field-effect transistor (FET) has a threshold voltage of -2.2 V, a field-effect mobility of 0.1 cm2/V s, an Ion/off ratio of 3.8×103, and a slope of 1.3 V/decade. Compared to a single gate OFET, dual-gate FET has better performance with higher drain output current at the relatively low operating voltage, larger field-effect mobility, and better channel controllability by separately adjusting two gate biases.

Published in:
Applied Physics Letters  (Volume:86 ,  Issue: 6 )

Date of Publication: Feb 2005

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