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A 140 mm/sup 2/ 64 Mb AND flash memory with a 0.4 /spl mu/m technology

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12 Author(s)
Miwa, H. ; Device Dev. Center, Hitachi Ltd., Tokyo, Japan ; Tanaka, T. ; Oshima, K. ; Nakamura, Y.
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This 3.3 V single supply flash memory is for hand-held computers. Low bit cost is a requirement for portable use. AND flash memories have the advantages of small cell size leading to low bit cost and small program/erase size, resulting in fast efficient operation. This 64Mb flash memory is designed for serial-access flash memory cards. Memory array area is reduced by a source line plate layout. Peripheral circuit area is reduced by command/address multiplex for the input circuit, serial address comparison for the redundancy circuit, and an internal low-voltage erase circuit for the X decoder. Using the above methods, a 139.9 mm/sup 2/ chip and 67.4% cell efficiency are realized.

Published in:

Solid-State Circuits Conference, 1996. Digest of Technical Papers. 42nd ISSCC., 1996 IEEE International

Date of Conference:

10-10 Feb. 1996