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Reliability characteristics of metal‐oxide‐semiconductor capacitors with chemical vapor deposited Ta2O5 gate dielectrics

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3 Author(s)
Lo, G.Q. ; Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas 78712 ; Kwong, D.L. ; Lee, S.

Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.108537 

This letter discusses the reliability characteristics of metal‐oxide‐semiconductor capacitors with chemical‐vapor‐deposited Ta2O5 gate dielectric films. To be compatible with the conventional polycrystalline Si‐gate process, SiO2 or Si3N4 film was deposited on Ta2O5 as the top dielectric layer. It is found that under high‐field stress, interface state generation is enhanced with the presence of the top dielectric layers, probably due to the anode‐field increase caused by the positive‐charge buildup in the stacked dielectrics capacitors. The significant positive‐charge build‐up in capacitors with top dielectrics is believed to be due to the hole‐injection‐barrier from Ta2O5 to SiO2 or Si3N4 and/or damage creation in the Ta2O5 films.

Published in:

Applied Physics Letters  (Volume:62 ,  Issue: 9 )

Date of Publication:

Mar 1993

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