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Wafer-scale integration of GaAs optoelectronic devices with standard Si integrated circuits using a low-temperature bonding procedure

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11 Author(s)
Georgakilas, A. ; Microelectronics Research Group, IESL-FORTH and Physics Department, University of Crete, P.O. Box 1527, 71110, Heraklion, Crete, Greece ; Deligeorgis, G. ; Aperathitis, E. ; Cengher, D.
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Your organization might have access to this article on the publisher's site. To check, click on this link:http://dx.doi.org/+10.1063/1.1531221 

A methodology for the heterogeneous integration of epitaxial GaAs wafers with fully processed standard bipolar complementary metal-oxide-semiconductor Si wafers is presented. The complete low-temperature wafer bonding process flow, including procedures for the Si wafer planarization and GaAs substrate removal, has been developed and evaluated. The implementation of an in-plane optical link, consisting of an edge-emitting laser diode, a waveguide and a photodiode, is demonstrated. © 2002 American Institute of Physics.

Published in:

Applied Physics Letters  (Volume:81 ,  Issue: 27 )

Date of Publication:

Dec 2002

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