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The formation and annealing of hot-carrier-induced degradation in poly-Si TFT's, MOSFET's, and SOI devices, and similarities to state-creation in αSi:H

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1 Author(s)
N. D. Young ; Philips Res. Labs., Redhill, UK

The device characteristics of poly-Si TFTs, MOSFETs and SOI devices have been compared before and after hot-carrier-stressing, and subsequent annealing. It is found that the same types of degradation are seen for all of the different types of device, and that these degradations are related to the creation of at least two types of interface state. The time and temperature dependence of the annealing of these defects leads us to believe that hydrogen diffusion in the gate oxide is the limiting process during the anneal. Furthermore, additional experiments involving gate-bias-annealing infer that the defects seen are closely related to those found after negative gate-bias-stress, and to those found in the bulk of hydrogenated amorphous silicon

Published in:

IEEE Transactions on Electron Devices  (Volume:43 ,  Issue: 3 )