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A self-consistent Monte Carlo (MC) simulator is employed to investigate and compare hot electron phenomena in three competing design strategies for 0.1 /spl mu/m SOI n-MOSFETs operating under low voltage conditions, i.e., V/sub d/ considerably less than the Si-SiO/sub 2/ injection barrier height /spl phi//sub b/. Simulations of these designs reveal that non-local carrier transport effects and two-dimensional current how play a significant role in determining the relative rate and location of hot electron injection into both the front and back oxides. Specifically, simulations indicate that electron-electron interactions near the drain edge are a main source of electron energies exceeding /spl phi//sub b/. The hot electron injection distributions are then coupled with an empirical model to generate interface state distributions at both the front and back oxide interfaces. These interface states are incorporated into a drift-diffusion simulator to examine relative hot-electron-induced device degradation for the three 0.1 /spl mu/m SOI designs. Simulations suggest that both the Si layer thickness and doping distribution affect device sensitivity to hot-electron-induced interface states. In particular, the simulations show that a decrease in the channel doping results in increased sensitivity to back oxide charge. In the comparison of the heavily-doped designs, the design with a thinner T/sub Si/ experiences significantly more hot-electron-induced oxide damage in the back oxide and more degradation from the charged states at the back interface.
Date of Publication: Feb. 1996