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Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation

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6 Author(s)
Gudmundsson, V. ; Sch. of Inf. & Commun. Technol., R. Inst. of Technol., Kista ; Hellstrom, P.-E. ; Luo, Jun ; Lu, Jun
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Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (< 700degC) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (tSi = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 ldr 1015 and 5 ldr 1015 cm-2. Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.

Published in:

Electron Device Letters, IEEE  (Volume:30 ,  Issue: 5 )