Electron mobility in scaled silicon metal-oxide-semiconductor field-effect transistors on off-axis substrates

Off-axis silicon wafers promise monolithic integration of III-V optoelectronics with silicon microelectronics. However, it is unclear how miniaturization affects electronic device performance on off-axis substrates. We present the fabrication and characterization of metal-oxide-semiconductor field-effect transistors (MOSFETs) with different gate lengths on regular Si(100) and 4° off-axis wafers. The field-effect electron mobility in the off-axis devices is lower than in their (100)-wafer counterparts with equivalent gate length. Monte Carlo simulations have reproduced the experimental data and demonstrated that the mobility degradation in off-axis devices stems from enhanced electron scattering from the Si/SiO₂ surface roughness. Short-channel MOSFETs on (100) and off-axis substrates perform comparably.