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Gain optimization in ion sensitive field-effect transistor based sensor with fully depleted silicon on insulator

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6 Author(s)
Shalev, Gil ; Intel Research Israel Laboratory, Intel Electronics, Jerusalem 91031, Israel ; Doron, Amihood ; Virobnik, Udi ; Cohen, Ariel
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The sensitivity in bulk silicon (Si) and in silicon-on-insulator (SOI) ion sensitive field-effect transistor (ISFET) is determined according to its manufacturing process, geometry, and the selected materials. However, in SOI ISFETs the back gate biasing plays a major part in device sensitivity. It is shown that in fully depleted SOI ISFET the existing charge coupling between the front and back interfaces allows for gain optimization in terms of both gain increase and widening of the conventional gain peak. This stands in contrast with bulk Si ISFET where only a single channel exists. Here we report gain increase in ∼40% and increase in gain peak width of ∼250%.

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Applied Physics Letters  (Volume:93 ,  Issue: 8 )