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Drain bias induced threshold voltage variation in short channel polycrystalline silicon (polysilicon) thin-film transistors (TFTs) are investigated, combining experimental measurements and two-dimensional numerical simulations. We show that drain induced barrier lowering and floating body effects, induced by impact ionization, are the main causes of such variations. Field enhanced mechanisms, causing leakage current, tend to mitigate the effect of impact ionization, since they provide an enhanced recombination rate in the high field region. This result is in contrast to what is suggested for silicon-on-insulator devices and also applied to polysilicon TFTs, where leakage current is assumed to contribute to floating body effects.