By Topic

Reduction in threshold voltages in GaN-based metal oxide semiconductor field effect transistors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Fujishima, Tatsuya ; Research and Development Headquarters, ROHM Co., Ltd., Kyoto 615-8585, Japan ; Otake, Hirotaka ; Ohta, Hiroaki

Your organization might have access to this article on the publisher's site. To check, click on this link: 

The dc characteristics, such as on-resistances (Ron) and threshold voltages (Vth), of gallium nitride-based metal oxide semiconductor field effect transistors with vertical trench gates have been theoretically derived. The optimized acceptor density and the thickness of p-type layers for n channels (channel length) were estimated to be 3×1017 cm-3 and 0.5 μm, respectively, in order to realize Ron in the sub-mΩ cm2 range. On the other hand, this resulted in a high Vth of 18 V due to the wide bandgap. To achieve low Ron and moderate Vth less than 10 V simultaneously, the insertion of an additional p--type or n-type layer with finite thickness between the gate insulator and the p-type layer was suggested.

Published in:

Applied Physics Letters  (Volume:92 ,  Issue: 24 )