In this work, we studied the effects of postdeposition anneal (PDA) time and Si interface passivation layer on the material and electrical characteristics of the metal-oxide-semiconductor (MOS) capacitor with high-k (HfO2) material on different orientation substrates with (100), (110), and (311). The interfacial change of HfO2/Si/GaAs gate stacks after PDA has been characterized using x-ray photoelectron spectroscopy (XPS) and Dit measurement using conductance method and frequency dispersion. XPS measurement shows the formation of gallium and arsenic oxides with increasing annealing temperature. Unoxidized Si and gallium and arsenic oxides formation in the interface might act as traps. Self-aligned MOS field effect transistors using PDA at 600 °C and post-metal-annealing at 800 °C have also been fabricated and characterized. The (100) substrate has lower density of interface traps and higher mobility due to reduced Ga2O3 formation.