Anomalous negative bias temperature instability behavior in p-channel metal-oxide-semiconductor field-effect transistors with HfSiON/SiO₂ gate stack

In this letter, the authors systematically investigated the behavior of negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with HfSiON/SiO₂ gate stack. They found that typical linear extrapolation does not work well for the lifetime extraction at the normal operation conditions since the polarities of the net trapped charge inside the high-κ dielectrics are not the same at lower and higher stress voltage regimes. In other words, as |V_g|≪2.5 V electron trapping dominated while hole trapping dominated when |V_g|≫2.5 V. This phenomenon obviously contradicts the essence of the linear prediction in which the same degradation mechanism is assumed through the entire stress voltage range.