By Topic

High performance, energy efficient master-slave flip-flop circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Uming Ko ; Texas Instrum. Inc., Dallas, TX, USA ; P. T. Balsara

This paper investigates performance, power and energy efficiency of several CMOS master-slave D-flip-flops (DFFs). To improve performance and energy efficiency, a push-pull DFF and a push-pull isolation DFF are proposed. Among the five DFFs compared, the proposed push-pull isolation circuit is found to be the fastest with the highest energy efficiency and a minimum data pulse width property. Effects of using DPL circuit and tri-state push-pull driver are studied. The impact of scaling supply voltage alone and scaling transistor threshold voltage with supply voltage on speed and power consumption of these circuits is also examined.

Published in:

Low Power Electronics, 1995., IEEE Symposium on

Date of Conference:

9-11 Oct. 1995