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Interface charge compensation in InP based heterojunction bipolar transistors with implanted subcollectors

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8 Author(s)
Parthasarathy, N. ; Department of Electrical and Computer Engineering, University of California, Santa Barbara, California 93106 ; Kadow, C. ; Griffith, Z. ; Rodwell, Mark J.W.
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We report InP/In0.53Ga0.47As/InP double heterojunction bipolar transistors (DHBTs) with implanted subcollectors. We demonstrate the compensation of charge at the regrowth interface by the use of a blanket Fe implant. An isolated N++ subcollector is then formed by a patterned Si implant. With the compensation of the interface charge, this patterned subcollector eliminates the extrinsic base-collector capacitance Ccb associated with the base interconnect pad over the entire range of bias voltages. These implanted subcollector DHBTs with the shallow Fe implant have 363 GHz fτ and 410 GHz fmax. The dc current gain β∼40, BVceo=4.9 V, BVcbo=5.4 V, and Icbo≪70 pA at Vcb=0.3 V.

Published in:

Applied Physics Letters  (Volume:89 ,  Issue: 2 )