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Charge-trapping memory cell of SiO2/SiN/high-k dielectric Al2O3 with TaN metal gate for suppressing backward-tunneling effect

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3 Author(s)
Chang-Hyun Lee ; Semiconductor R&D Center, Memory Business, Samsung Electronics Co., LTD. and San #24, Nongseo-Ri, Kiheung-Eup, Yongin-City, Kyungki-Do 449-711, Korea ; Park, Kyu-Charn ; Kim, Kinam

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We present a device structure of SiO2/SiN/Al2O3 (SANOS) with tantalum nitride (TaN) metal gate. When TaN metal gate is applied for the SANOS structure instead of commonly used n-type poly-silicon, the unwanted backward Fowler–Nordheim tunneling current of electron through the top oxide is significantly suppressed owing to its higher work function and better compatibility with high-k dielectrics. As a result, the program/erase speed is significantly improved and the erase threshold voltage (VTH) can be obtained to be negative voltage of -3.5 V.

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Applied Physics Letters  (Volume:87 ,  Issue: 7 )