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A simple analytical expression for the on-state current of polycrystalline silicon thin-film transistors is presented, valid in both linear and saturation regimes including the impact ionization effect. The maximum channel electric field and the avalanche multiplication factor are described in terms of an average trapped charge density at the grain boundary, varying with gate voltage due to the continuous energy distribution of the grain boundary trap states. Based on the parameters of the charge inversion voltage, effective carrier mobility and grain boundary barrier height which are extracted from the transfer characteristic at low drain voltage, the model reproduces the experimental output characteristics in devices with different gate lengths using few fitting parameters.