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Formation and characterization of nanometer scale metal-oxide-semiconductor structures on GaAs using low-temperature atomic layer deposition

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4 Author(s)
Ye, P.D. ; School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907 ; Wilk, G.D. ; Tois, E.E. ; Wang, Jian Jim

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Atomic layer deposition (ALD) grown Al2O3 has excellent bulk and interface properties on III-V compound semiconductors and is used as gate dielectric for GaAs and GaN metal-oxide-semiconductor field-effect transistors (MOSFETs). The low-temperature (LT) ALD technology enables us to fabricate 100 nm MOS structures on GaAs, defined by nanoimprint lithography. The electrical characterization of these nanostructured dielectrics demonstrates that the bulk oxide films and the oxide-GaAs interfaces are of high quality even in nanometer scale. The submicron gate length GaAs MOSFET formed by LT-ALD and lift-off process shows well-behaved transistor characteristics. This GaAs MOSFET process is ready to scale the gate length below 100 nm for ultra-high-speed or THz transistor applications.

Published in:

Applied Physics Letters  (Volume:87 ,  Issue: 1 )

Date of Publication:

Jul 2005

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