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an optimized rendering algorithm for hardware implementation of openVG 2D vector graphics

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3 Author(s)
Kilhyung Cha ; Electr. Eng. & Comput. Sci. Dept., Seoul Nat. Univ., Seoul ; Daewoong Kim ; Soo-Ik Chae

An optimized rendering algorithm of the OpenVG 2D vector graphics for hardware implementation is presented in this paper. In the rendering algorithm we adopted a hybrid of raster and vector rendering, which uses vector rendering only within each scanline, to reduce both the number of external memory accesses and the computational complexity. We implemented a hardware accelerator with the proposed algorithm. Experimental results show that our hardware accelerator can handle 11.8 fps of Tiger image for a QVGA panel at the operating clock frequency of 100 MHz.

Published in:
SoC Design Conference, 2008. ISOCC '08. International  (Volume:01 )

Date of Conference: 24-25 Nov. 2008

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