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TunableVP: A Tunable Virtual Platform for easy SoC design space exploration

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6 Author(s)
Ye-Jyun Lin ; Department of Computer Science and Information Engineering, National Taiwan University, Taiwan ; Yi-Jung Chen ; Chin-Chie Huang ; Tzu-Ching Lin
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Platform-based system-on-chip (SoC) design has been a commonly used design methodology for billion-transistor SoC coupled with short time to market requirement. One main issue of the system level design in a platform-based SoC is to determine the system architecture that meets the design goals. To avoid over-design, or a design that cannot meet the design goals, a tool with the ability to provide the performance/power estimation for the whole system is critical. In this paper, we developed a tool, named TunableVP (Tunable Virtual Platform), that allows an SoC designer to evaluate system-level energy/performance tradeoff at the early stage of design cycle.

Published in:

SoC Design Conference, 2008. ISOCC '08. International  (Volume:01 )

Date of Conference:

24-25 Nov. 2008