By Topic

LTR: A low-overhead and reliable routing algorithm for network on chips

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Patooghy, A. ; Comput. Eng. Dept., Sharif Univ. of Technol., Tehran ; Miremadi, S.G.

A fault tolerant routing algorithm is presented in this paper. The proposed routing algorithm is based on making a redundant copy of each packet as well as sending the redundant packets through the paths with low traffic loads. Since two copies of each packet reach the destination node, the erroneous packets are detected and replaced with the correct ones. To effectively use the paths with lower traffic loads, the redundant packets are routed according to YX routing while the original packets are routed according to Duato's routing algorithm. Minimizing the number of sent redundant packets and exploiting different paths for sending the original and redundant packets enable the proposed algorithm to improve the reliability of NoCs with negligible power and performance overheads. VHDL simulations confirm that the proposed routing algorithm imposes lower power and performance overheads while providing almost the same reliability in comparison with flood-based routing algorithms.

Published in:

SoC Design Conference, 2008. ISOCC '08. International  (Volume:01 )

Date of Conference:

24-25 Nov. 2008